IBIS Macromodel Task Group Meeting date: 21 Aug 2012 Members (asterisk for those attending): Agilent: * Fangyi Rao * Radek Biernacki Altera: David Banas Julia Liu Hazlina Ramly Andrew Joy Consulting: * Andy Joy ANSYS: Samuel Mertens * Dan Dvorscak Curtis Clark Steve Pytel * Luis Armenta Arrow Electronics: Ian Dodd Cadence Design Systems: Terry Jernberg * Ambrish Varma Feras Al-Hawari Cavium Networks: Johann Nittmann Celsionix: Kellee Crisafulli Cisco Systems: Ashwin Vasudevan Syed Huq Ericsson: Anders Ekholm IBM: * Greg Edlund Intel: Michael Mirmak Maxim Integrated Products: * Mahbubul Bari Mentor Graphics: * John Angulo Zhen Mu * Arpad Muranyi Vladimir Dmitriev-Zdorov Micron Technology: Randy Wolff * Justin Butterfield NetLogic Microsystems: Ryan Couts Nokia-Siemens Networks: * Eckhard Lenski QLogic Corp. * James Zhou Sigrity: * Brad Brim Kumar Keshavan Ken Willis SiSoft: * Walter Katz Todd Westerhoff Doug Burns * Mike LaBonte Snowbush IP: Marcus Van Ierssel ST Micro: Syed Sadeghi Teraspeed Consulting Group: Scott McMorrow * Bob Ross TI: Casey Morrison Alfred Chong Vitesse Semiconductor: Eric Sweetman Xilinx: * Mustansir Fanaswalla Ray Anderson The meeting was led by Arpad Muranyi ------------------------------------------------------------------------ Opens: - Bob: Would like to address IBIS parser issues -------------------------- Call for patent disclosure: - None ------------- Review of ARs: - Walter email a list of package modeling features for voting - Done - Arpad prepare example BIRD 125 IBIS file set - not done - Bob to propose a simpler way for addressing the needs of parameter passing under [External Model] and [External Circuit] - not done ------------- New Discussion: Bob discussed AMI changes in the new IBIS parser: - Bob: Initially there was a warning for parameter name collisions - It now checks for collisions only within each branch - The leaf check for Description has been fixed, allowing only one per branch - Arpad: This Friday might be the big day for IBIS 5.1 Luis Armenta introduced himself: - He is working on AMI models at ANSYS Walter showed a presentation: - Walter: This presentation has been sent out - It summarizes use of parameter trees and IBIS-ISS for various models - Some slides are brief summaries - slide 5: - Walter: This example explains the proposal for packages - slide 6: - Walter: This tree shows a typical on-die model - There are 4 bump pads for power and ground - Power and signals could be merged together - slide 7: - Walter: This package model tree looks similar to the on-die one - slide 8: - Walter: This adds length modeling where that is known - slide 9: - Walter: This package tree shows victims and aggressors for crosstalk - slide 10: - Walter: Arpad asked for both package and on-die trees here - This makes the model understandable and easy for EDA tools to use - slide 11: - Walter: [Path Description] can be converted programmatically to IBIS-ISS - slide 12: - Walter: Here is a legacy EBD file - It has comments to show what things are - Arpad: Do the slashes precede comments? - Mike: They are for continuation, pipe characters for comments - Walter: I may have modified this - slide 13: - Arpad: The red line doesn't say how the IBIS-ISS package is connected - Walter: Good point but we will not be pursuing that - slide 15: - Walter: Gd and RS are critical, but EBD doesn't support them - slide 16: - Walter: This replaces a path description - James: Is U1 a reference designator? - Walter: Yes, this EBD is for a DIMM board - Fangyi: Would this work without the pin order? - Walter: That could work - slide 17: - Walter: EMD "module" is less constraining than EBD "board" - slide 18: - Walter: This is the legacy EBD converted to EMD - The only new thing here is Diff_Pins - slide 19: - Walter: Nothing is different for a connector - Defining the A and B sides may not be necessary - Vendors often give slice models from which all pins are derived - Fangyi: The unconnected pins are assumed to be open? - Walter: Or 50 ohms to ground, etc. - A typical method is to extract a smaller s4p - Fangyi: It still depends on what is assumed for the other ports - Walter: They are effectively open - Radek: That will not work - Arpad: Some models are not symmetric in each direction - Walter: The A and B signal names handle that - slide 20: - Walter: Some of our existing BIRDs are gobbledygook - There is confusing baggage - slide 21: - Walter: [External IBIS-ISS Model] is a simple way to handle it - Stimulus and other items are easily defined in tree format - Arpad: Stimulus is what the DtoA converters handle - This is a new keyword for something that exists - Walter: The Model_Ports syntax is very simple - slide 22: - Walter: We should reject the listed BIRDs and create a new IBIS 6.0 EMD section - I will make this motion Friday at the Open Forum meeting - slide 21: - Fangyi clarified how the TX Stimulus parameter works with the model ports - Walter: IBIS-ISS is invalid for most buffer models because it can't handle input and enable - PWLs or macros would have to be added, as in IBIS-BSS - Model_Ports is similar to Model Connection Protocol - James: How to tell which ports are connected to stimulus? - Walter: Drive is a reserved name for that - We might want to call that Stimulus - This attempts to not make too many changes - It will be a lot of work to write this BIRD, it should be a group effort - Fangyi: Coloring the reserved names may help avoid future questions - James asked about the format of the Tstonefile parameter - Walter: It goes into the AMI file to get the value - Some AMI models have many "knobs", and some change the Tstonefile - Radek: The right side model is used only with AMI models? - Walter: Values can be directly specified here - slide 22: - Ambrish: This replaces all of the BIRDs proposed for rejection? - Walter: Yes, for example the package and on-die models replace [Circuit Call] - What I'm proposing requires only one new parser AR: Walter send slides with modifications for posting Bob: This Friday IBIS 5.1 is the priority - There may not be much time for other items ------------- Next meeting: 28 Aug 2012 12:00pm PT Next agenda: 1) Task list item discussions ------------- IBIS Interconnect SPICE Wish List: 1) Simulator directives